8bit ISA video board version 1
The aim of this project is to build a videoboard that can be put in a
personal computer. The software in the PC will control the framebuffer
and some functions of the board itself. This is version 1 as i intend
to build a more complex one, but this one is more as a test to get
familiar with ISA busses and VGA signal generation.
Specifications
The board will have the following capabilites:
- VGA resolution 640*480 at 60 Hz (with a 25.175MHz oscillator) or
640*480 at 68Hz (with a 28.3220MHz oscillator).
- 15 bit color.
- 128kb videoram
- Wait state generation to prevent conflicts
- 8 bit data bus, 20 bit adress bus.
- memory mapped frame buffer.
- several registers at adress 220 (its not used in the old 80286 PC)
The board will be built out of the following:
- 2 XC9572 PC84-15C CPLD's
- 4 * 32Kb ram chips with a acess time of 25ns.
- 74LS245 bus tranciever.
Pictures
Here are some pictures of the card itself. And some of its operations.

Front side of the board. The pictures where taken at low light so you
cant make out all of the details. The big PLCC84 chips are the XC9572
chips. Upper one is the clock generator and video driver. Lower one is
the bus interface. The memories and some latches have not been placed.
The upper white pin header is the boundary scan access port. I program
the whole via a selfmade XilinX parallel cable 3. (Schematic is also on
my site). The connector part has been sawed off a old modem board and
reattached to a protoboard.

Underside of the Card, the blue wires are mostly the interface wiring
to the analog output and the ISA bus. The small orange cubes are
tantalum capacitors to decouple the chip. There are smaller ceramic
capacitors of 100nf and 10nf on each power and ground pin to reduce
ground bounce.

Here is the card installed in a old 80286 PC. I use this computer as a
sacrificial computer so if anything blows on the board. I just put in a
new 80286 mainboard. Got plenty of them lying around here that are
still working. Altough i am stripping more and more of their logic
chips :-) . The yellow LED is the power indicator.

Here is some of the output. The adress counters output has been XORed
with eachother to make a colorful block pattern. Altough the LCD doesnt
really show it too well. I test my card on a LCD screen becouse its
safer. A multisync screen can be oversteered and may ruin the monitor
if you feed it weird signals, some screens are more sensitive then
others. But better not take any chance.

There 2 pictures show my VGA signal generator. This was the basis of my
own VGA card, i started generating signals. There is a great site on
VGA signal generation here.
It contains a lot of other video modes as well. The generator is now
also generating adress, read and chipenable signals to read out a flash
bios rom. I use the rom as a sort of test output if the signals that it
generates are correct. The rom is 70ns but i really dont care if its
correct. (You should need 45ns or faster chips for the framebuffer).
Here is the code for the signal
generator.

This is what is stored in the flash rom BIOS chip, lots of colors and
signals. So it works.
Description
This board is still under construction but here is some details.
The upper chip is the clock generator and drives RGB channels trough 3,
5 resistor networks. giving about 15 bits color. A SRAM chip will be
attached to the CPLD and will be basic storage for the framebuffer.
The lower chip is the ISA bus interface. It maps a segment of memory
for the framebuffer on adress D0000. and contains a register on adress
220 that controls some aspects of the card
Here is the Verilog code for the ISA interface and VGA generator, Version 0.0.1
When this board is finished, i am going to build a second version that
is a full 16 bit board with a 24 bit interface. This board will be more
enhanced becouse of more options like wider adresses and more memory.
It will be put in a 486 computer so i can program the large adress
range via DJGPP. But that project will get its own page.
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Last update at: 03-10-2005