DemoPlank
On one of the forums i frequent there was a idea of a sort of democompo
that revolves around some embedded systems. I chose to output on the
VGA screen.
Current plan is to use 2 XC9572-PC84 CPLD's to create VGA output with a
64K RAM chip. And a ATmega162 or a ATmega128 for the processing and
demo logic, the AVR will have its own 64K RAM. Still working on the
specifics but here is how far i got:
update 08 february 2006
I added some parts to the board, The Xilinx CPLD's have been added,
powered, and put in a JTAG chain. I was thinking about expanding the
interface from the AVR to the videomemory with some extra acceleration.
Like hardware OR ADD XOR for graphical effects, and even adding a way
to rapidly draw horizontal lines to accelerate polygon drawing. Maybe
another interesting thing to add is bounded memory transfers to
facilitate fast sprite drawing. There is a big problem that the video
buffer is only one screen. But with clever programming that can be
fixed. Also horizontal and vertical retraces can be hooked up outside
of the VGA cpld and connected to the AVR.
Here you can see the bottom side. The red and black wires deliver power
to both CPLD's.
The center copper colored surface is a bit of copper foil used as a
groundplane underneath the chip. The yellow cube is a small SMT
tantalum capacitor for primary decoupling. Around the copper surface
there is a power rail. Wherever a connection is made from the power
rail or ground plate a pair of 100nF and 10nF capacitors decouple. Why
10 and 100nF? Well as this is a high speed CMOS chip, it operates at
frequencies at 25MHz its power draw can have higher frequency
components then that. The 100nF capacitors have a to high ESR to
sufficiently decouple those components. The 10nF capacitors take over.
It is standard practice to decouple programmable logic this way. Xilinx
has a excellent application note about it.
More stuff coming up. The VGA code is basically ready, but needs to be
assigned to proper pins to check for function.
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Last update at: 08-02-2006